Freescale Semiconductor /MKL02Z4 /SIM /SOPT2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SOPT2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)TPMSRC 0 (00)UART0SRC

TPMSRC=00, UART0SRC=00

Description

System Options Register 2

Fields

TPMSRC

TPM clock source select

0 (00): Clock disabled

1 (01): MCGFLLCLK clock

2 (10): OSCERCLK clock

3 (11): MCGIRCLK clock

UART0SRC

UART0 clock source select

0 (00): Clock disabled

1 (01): MCGFLLCLK clock

2 (10): OSCERCLK clock

3 (11): MCGIRCLK clock

Links

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